This invention relates to electrical circuits.
The invention is more particularly concerned with power amplifiers.
It can be difficult to produce power amplifiers employing power FETs that can be driven at high slew rates because of the inherent gate-source and gate drain capacitance of such devices. Combined gate capacitance currents may approach 1 A at the highest slew rates demanded. Currents of this magnitude require drivers that insert propagation delays within feedback loops and this gives rise to de-coupling problems.
It is an object of the present invention to provide an alternative power amplifier.
According to the present invention there is provided a power amplifier including a pair of FETs of opposite kind connected together to form a source/drain circuit connected with an output, a second pair of transistors of opposite kinds connected together to form a collector/emitter circuit connected to the gate of respective ones of the FETs, the base of the second pair of transistors being connected to an input, and the amplifier including a capacitor connected between the gates of the two FETs such that when a large current is required one of the transistors of the second pair cuts off and the gate of one of the FETs is driven through said capacitance.
The amplifier may include two opposing current sources connected with respective positive and negative voltage supplies. Each current source preferably includes a transistor with a relatively low base-collector capacitance connected between respective ones of the voltage supplies and the input. The amplifier may include a plurality of resistors connected with said second pair of transistors and arranged such that current is divided substantially equally between the base and emitter of the second pair of transistors. The second pair of transistors is preferably selected to have a high speed and gain.
A power amplifier stage according to the present invention, will now be described, by way of example, with reference to the accompanying drawing.